The present invention relates generally to a circuit for controlling a memory in which a reproduced signal is stored for jitter elimination and time expansion purposes.
In conventional PCM systems, as shown and described in U.S. Pat. No. 4,206,476, a converted original signal is time-compressed and combined with error detection and correction codes and synchronization pulses prior to being recording on a recording medium. The reproduced original signal is separated from such control signals and coupled to a memory to expand its time dimension and eliminate jitter which has been introduced due to mechanical tolerances of the recording system. The memory is controlled by write and read address counters that store a jitter-affected digital signal in response to the jitter-affected sychronization pulse. The memory is read out by the counters in response to a standard constant rate pulse which occurs at a lower rate than the synchronization pulse so that the digital signal is time-expanded.
A shortcoming inherent in the conventional memory control circuit is that the memory may overflow when a large amount of jitter is generated; such overflow is due to transients such, as starting of the recorder in playback mode or a temporary fluctuation of tape. Noise is thus generated when the overflowing signal is converted into an analog signal.
In a prior art approach to solve this problem, disclosed in Japanese published application No. 52-102013, the read address counter is cleared when the memory is approaching an overflow condition to prevent overflow of the memory. A muting circuit masks the noise which would result from the rapid change in digital value when the reading address counter is cleared, thus producing an interruption of sound.